System Efficient ESD Design (SEED) address the protection of I/O against ESD using simulation. This allows to predict the robustness against damaging ESD and allows to reduce the likelihood of disturbances caused by ESD (soft-failure). Reduced design margin due to smaller, less current carrying metallization and contacts and thinner gate oxide has reduced the design window for ESD protection to a few V and...
Problems that arise when implementing an RF filter in modern signal interfaces are discussed. Effectiveness of filters under realistic impedance conditions, via peripheral cables in comparison to the 50Ohm-system are shown. Filter topologies are compared, the influence of filter design and peripheral cable impedance are explained. Filter topology adapted to the system, suitable components and an RF-compatible construction including layout are discussed. Critical points...
The control of EMI in electronic devices is an increasing issue faced by designers in order to ensure that devices comply with EMC requirements. The EMC testing process can reveal that the shielding of a certain area of a PCB or cable is needed or may even detect an unexpected EMI source. This presentation is focused on showing experimentally through some demos how it...
Often the success of an EMC test is closely related to the DCDC power supply on boards. This seminar will show the influence of different PCB designs as well as the passive components on the EMC signature using a real measured DCDC converter. In addition, suitable filter strategies will be presented in order to comply with the limits of CISPR32 Class B from 150kHz...
prof. Sam Ben-Yaakov in his video explains switching frequency impact to ferrite losses and its importance for proper design of magnetics, inductors, transformers, converters, inverters, PWM and power electronics.
